This invention relates to one-time programmable (OTP) semiconductor devices, such as described in U.S. Pat. Nos. 7,471,540 and 7,623,368, both of which are assigned to the present assignee and incorporated by reference herein for all purposes. The memory cell of such devices is arranged in an array of bit lines running in one direction and word lines running in a direction perpendicular to the bit lines. Each memory cell has a pass MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and a programmable element in the form of a second (MOSFET) transistor as shown in a cross-sectional view of FIG. 1A. The pass or select transistor is formed by a gate electrode 17 slightly removed from and spanning two N+ source/drain regions 13 and 14 located in a semiconductor body 12 of P-conductivity. The gate electrodes, such as electrode 17, can be formed by many different conductive materials including, e.g., doped polysilicon, metals (such as tungsten and tantalum), silicides (alloys of metal and polysilicon), and other materials and combinations of materials, which are well known in the semiconductor processing field. A thin insulating oxide layer 19, called a gate oxide, separates the body 12 and N+ regions 13 and 14 from the gate electrode 17. The two source/drain regions 13 and 14 and the gate electrode 17 define a channel region on the top of the body 12 for the pass transistor. The N+ source/drain region 13 is connected to a bit line and the N+ source/drain region 14 forms a source/drain region of a second MOSFET transistor, the programmable element. A second N+ source/drain region 15 which is electrically floating, is part of the second MOSFET transistor which has a gate electrode 16 slightly removed from and spanning the two N+ source/drain region 14 and 15. A thin insulating gate oxide layer 18 separates the body 12 and N+ regions 14 and 15 from the gate electrode 16. The two source/drain regions 14 and 15 and the gate electrode 16 define a channel region on the top of the body 12 for the programmable element.
The particular MOSFET technology shown in this example is a SOI (Silicon-On-Insulator) process and the P-type body 12 rests on an insulating BOX (Body OXide) layer 11 which in turn rests on a semiconductor substrate 10. The above-cited patents also disclose that OTP memory cells can be formed by other semiconductor processes, such as illustrated in FIG. 1B. Here the N+ source/drain regions of the MOSFET transistors are formed in a P-type body, a P-well which is located in a deep N-type well on a P-type substrate. The same reference numerals in FIG. 1A are used for similar regions in FIG. 1B. Reverse-biased PN junctions provide electrical isolation for the bulk/body regions 12 in FIG. 1B in contrast to the isolation provided to the body regions 12 by the BOX layer 11. Reference is made to the patents for further details of the different structures of the OTP memory cells which should not considered limitations of the present invention.
Each memory cell stores a bit of information, a “1” or a “0,” depending on whether the cell has been programmed or not. The particular correspondence between the value of a bit and whether the cell is programmed or not is arbitrarily defined. Programming is performed by the breakdown or rupture of the gate oxide 18 of the programming element, the second transistor. With the breakdown of the gate oxide 18, a conducting plug is formed through the gate oxide 18 to form a programmed connection between the gate electrode 16 and the N+ source/drain region 14 and/or the underlying body 12. Since a cell is programmed by creating an electrical connection, the described memory cells are sometimes called “anti-fuse” OTP cells.
A problem addressed by the cited patents is the variance in the quality of the programmed connection. Gate oxide breakdown can vary widely with unwelcome decreased conductivity and large variations in the conductivity of the memory cells of an array. The cited patents teach improvements in the gate oxide breakdown by, among other things, controlling the electric field in the programming process by controlling the bias of the body 12. Nonetheless, despite the improved programming results, it is still highly desirable that continued improvements in the programmed connections be achieved.